I am working with small/basic bare-metal Hypervisor set-up that starts in EL2, and later on switches to EL1 whereI have MMU set-up (using stage 1 translation) which is working. For instance the following snippet that sets-up the table.
```uint64_t *l1_table = ((load_addr) + SZ_1M);#if 1 /* Only one table (which is at level 1) is used, that just shows * with one table we can map 1GB of address space, where VA == PA */ l1_table[0] = (uint64_t)0x0000000; l1_table[0] |= PT_BLOCK | PT_KERNEL | PT_AF; l1_table[0] |= (MT_DEVICE << 2); l1_table[1] = (uint64_t)0x40000000; l1_table[1] |= PT_BLOCK | PT_AF | PT_KERNEL; l1_table[1] |= (MT_NORMAL << 2);#endifI wanted to set-up stage 2 translation, where I would like to use IPA from stage 1 as an input to stage 2 translation table.
I guess, tables for stage 2 translation needed to be set-up while control is in EL2 but I don'tunderstand how to fetch IPA generated during stage 1 for stage 2 translation, and how table structure would look like for stage 2.
Are the PTEs for stage 2 table is based on IPA generated during stage 1 of stage 2 translation?