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How and when host CPU state is saved in the VMCS host-state area?

I'm trying to understand the basics of how Intel VMX/VT-x works. In the Intel Software Developer Manual it says this about VMCS:

The VMCS data are organized into six logical groups:
Guest-state area. Processor state is saved into the guest-state areaon VM exits and loaded from there on VM entries.
Host-state area. Processor state is loaded from the host-state area onVM exits.
...

It makes sense to me that the CPU state is save into the guest-area on VM exits and loaded on VM entries. It also makes sense that the CPU state is loaded from the host-state area on VM exits... but when is the CPU state saved in the host-state area? Intuitively I would say that it is saved on VM entries, but the manual doesn't say so... can somebody help me clarify this?

Thanks


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